1. Field of the Invention
The present invention relates to data multiplexing techniques for use in mixed-signal circuitry and integrated circuit devices, for example digital-to-analog converters (DACs). Such mixed-signal circuitry and devices include a mixture of digital circuitry and analog circuitry.
2. Description of the Related Art
FIG. 1 of the accompanying drawings shows parts of a conventional DAC integrated circuit (IC) of the so-called "current-steering" type. The DAC 1 is designed to convert an m-bit digital input word (D1-Dm) into a corresponding analog output signal.
The DAC 1 contains analog circuitry including a plurality (n) of identical current sources 2.sub.1 to 2.sub.n, where n=2.sup.m -1. Each current source 2 passes a substantially constant current I. The analog circuitry further includes a plurality of differential switching circuits 4.sub.1 to 4.sub.n corresponding respectively to the n current sources 2.sub.1 to 2.sub.n. Each differential switching circuit 4 is connected to its corresponding current source 2 and switches the current I produced by the current source either to a first terminal, connected to a first connection line A of the converter, or a second terminal connected to a second connection line B of the converter.
Each differential switching circuit 4 receives one of a plurality of digital control signals T1 to Tn (called "thermometer-coded signals" for reasons explained hereinafter) and selects either its first terminal or its second terminal in accordance with the value of the signal concerned. A first output current I.sub.A of the DAC 1 is the sum of the respective currents delivered to the differential-switching-circuit first terminals, and a second output current I.sub.B of the DAC 1 is the sum of the respective currents delivered to the differential-switching-circuit second terminals.
The analog output signal is the voltage difference V.sub.A -V.sub.B between a voltage V.sub.A produced by sinking the first output current I.sub.A of the DAC 1 into a resistance R and a voltage V.sub.B produced by sinking the second output current I.sub.B of the converter into another resistance R.
In the FIG. 1 DAC the thermometer-coded signals T1 to Tn are derived from the binary input word D1-Dm by digital circuitry including a binary-thermometer decoder 6. The decoder 6 operates as follows.
When the binary input word D1-Dm has the lowest value the thermometer-coded signals T1-Tn are such that each of the differential switching circuits 4.sub.1 to 4.sub.n selects its second terminal so that all of the current sources 2.sub.1 to 2.sub.n are connected to the second connection line B. In this state, V.sub.A =0 and V.sub.B =nIR. The analog output signal V.sub.A -V.sub.B =-nIR.
As the binary input word D1-Dm increases progressively in value, the thermometer-coded signals T1 to Tn produced by the decoder 6 are such that more of the differential switching circuits select their respective first terminals (starting from the differential switching circuit 4.sub.1) without any differential switching circuit that has already selected its first terminal switching back to its second terminal. When the binary input word D1-Dm has the value i, the first i differential switching circuits 4.sub.1 to 4.sub.i select their respective first terminals, whereas the remaining n-i differential switching circuits 4.sub.i+1 to 4.sub.n select their respective second terminals. The analog output signal V.sub.A -V.sub.B is equal to (2i-n)IR.
FIG. 2 of the accompanying drawings shows an example of the thermometer-coded signals generated for a three-bit binary input word D1-D3 (i.e. in this example m=3). In this case, seven thermometer-coded signals T1 to T7 are required (n=2.sup.m -1=7).
As FIG. 2 shows, the thermometer-coded signals T1 to Tn generated by the binary-thermometer decoder 6 follow a so-called thermometer code in which it is known that when an rth-order signal Tr is activated (set to "1"), all of the lower-order signals T1 to Tr-1 will also be activated.
Thermometer coding is popular in DACs of the current-steering type because, as the binary input word increases, more current sources are switched to the first connection line A without any current source that is already switched to that line A being switched to the other line B. Accordingly, the input/output characteristic of the DAC is monotonic and the glitch impulse resulting from a change of 1 in the input word is small.
However, when it is desired to operate such a DAC at very high speeds (for example 100 MHz or more), it is found that glitches may occur at one or both of the first and second connection lines A and B, producing a momentary error in the DAC analog output signal V.sub.A -V.sub.B. These glitches in the analog output signal may be code-dependent and result in harmonic distortion or even non-harmonic spurs in the output spectrum. Some of the causes of these glitches have been determined to be as follows.
Firstly, the digital circuitry (the binary-thermometer decoder 6 and other digital circuits) is required to switch very quickly and its gate count is quite high. Accordingly, the current consumption of the digital circuitry could be as much as 20 mA per 100 MHz at high operating speeds. This combination of fast switching and high current consumption inevitably introduces a high degree of noise into the power supply lines. Although it has previously been considered to separate the power supplies for the analog circuitry (e.g. the current sources 2.sub.1 to 2.sub.n and differential switching circuits 4.sub.1 to 4.sub.n in FIG. 1) from the power supplies for the digital circuitry, this measure alone is not found to be wholly satisfactory when the highest performance levels are required. In particular, noise arising from the operation of the binary-thermometer decoder 6 can lead to skew in the timing of the changes in the thermometer-coded signals T1 to Tn in response to different changes in the digital input word D1 to Dm. For example, it is estimated that the skew may be several hundreds of picoseconds. This amount of skew causes significant degradation of the performance of the DAC and, moreover, being data-dependent, the degradation is difficult to predict.
Secondly, in order to reduce the skew problem mentioned above, it may be considered to provide a set of latch circuits, corresponding respectively to the thermometer-coded signals T1 to Tn, between the digital circuitry and the analog circuitry, which latches are activated by a common timing signal such that the outputs thereof change simultaneously. However, surprisingly it is found that this measure alone is not wholly effective in removing skew from the thermometer-coded signals. It is found, for example, that data-dependent jitter still remains at the outputs of the latch circuits and that the worst-case jitter increases in approximate proportion to the number of thermometer-coded signals. Thus, with (say) 64 thermometer-coded signals the worst-case jitter may be as much as 20 picoseconds which, when high performance is demanded, is excessively large.
These problems have been addressed in our copending U.S. applications Ser. Nos. 09/227,201 and 09/382,459 (corresponding respectively to United Kingdom patent publication nos. GB-A-2335097 and GB-A-2341287), the entire contents of which are incorporated herein by reference, which disclose DACs having the configuration as shown in FIG. 3 of the accompanying drawings. The FIG. 3 circuitry is divided into three sections: a digital section, a latch section and an analog section. The latch section is interposed between the digital and analog sections.
The digital section comprises decoder circuitry 10, which is connected to other digital circuitry (not shown) to receive an m-bit digital input word D1.about.Dm. The decoder circuitry 10 has an output stage made up of n digital circuits DC1 to DCn which produce respectively thermometer-coded signals T1 to Tn based on the digital input word, for example in accordance with the table of FIG. 2 discussed hereinbefore.
The latch section comprises a set 12 of n latch circuits L1 to Ln. Each latch circuit is connected to receive an individually-corresponding one of the thermometer-coded signals T1 to Tn produced by the decoder circuitry 10. Each latch circuit L1 to Ln also receives a clock signal CLK. The latch circuits L1 to Ln produce at their outputs respective clocked thermometer signals TCK1 to TCKn that correspond respectively to the thermometer-coded signals T1 to Tn produced by the decoder circuitry 10.
In each cycle of the DAC IC a new sample of the digital input word D1-Dm is taken and so the thermometer-coded signals T1 to Tn normally change from one cycle to the next. In each cycle, it inevitably takes a finite time for these signals to settle to their intended final values from the moment the new sample is taken. Also, inevitably some digital circuits DC1 to DCn will produce their respective thermometer-coded signals earlier than others. By virtue of the clocked operation of the latch circuits L1 to Ln, the clocked thermometer signals TCK1 to TCKn can be prevented from changing until all the thermometer-coded signals T1 to Tn have settled to their intended values for a particular cycle of the DAC.
The analog section comprises a set 14 of n analog circuits AC1 to ACn. Each of the analog circuits AC1 to ACn receives an individually-corresponding one of the clocked thermometer signals TCK1 to TCKn. The analog circuits AC1 to ACn each have one or more analog output terminals and signals produced at the analog output terminals are combined appropriately to produce one or more analog output signals. For example, currents may be summed by summing connection lines as in FIG. 1. Two such analog output signals OUTA and OUTB are shown in FIG. 3 by way of example.
In the FIG. 3 circuitry, each digital circuit DC1 to DCn, together with its corresponding latch circuit L1 to Ln and its corresponding analog circuit AC1 to ACn, constitutes a so-called "cell" of the DAC. Thus, each cell includes a digital circuit DC, a latch circuit L and an analog circuit AC. The digital circuit DC produces a first digital signal (thermometer-coded signal) T for its cell. The latch circuit for the cell receives the first digital signal T and delivers to the analog circuit AC of the cell a second digital signal (clocked thermometer signal) TCK corresponding to the first digital signal T once the first digital signals of all cells have settled to their final intended values. Thus, the latch circuit serves as a signal control circuit for deriving the second digital signal from the first digital signal and controlling the timing of its application to the analog circuit AC. The second digital signal TCK serves as a control signal for use in controlling a predetermined operation of the analog circuit AC of the cell. This predetermined operation may be any suitable type of operation of the cell. For example, it could be a switching or selection operation for switching on or off, or controlling the output path of, an analog output signal of the cell.
However, with such a configuration as described above, as attempts are made to increase the sampling rate of such a DAC (e.g. to 1 Gsamples/s), it becomes increasingly difficult to control the latching of the selection signals T1 to Tn reliably. This may be partly because of problems associated with distributing the very fast clock signal CLK so that it arrives simultaneously at all the latches, and partly because the decoder circuitry itself may not be able to operate fast enough at such high sampling rates.